Virtual reality (VR) and augmented reality (AR) display systems require considerable computing resources and transmission bandwidth to generate high-resolution imagery and to transmit the imagery for display at sufficiently high refresh rates. This is particularly the situation in systems that utilize head mounted display (HMD) devices as the high-throughput image rendering and transmission processes are performed in parallel for each eye of a user. As such, conventional HMD-based display systems often require significant computing resources to render the imagery at a sufficient rate, and a complex and high-power physical layer used to transmit the data representative of the rendered imagery to the one or more display devices.
In an effort to reduce the computing and transmission requirements, conventional VR systems, AR systems, and other near-eye display systems may implement a foveal rendering process, in which the region of an image that is the focus of the eye (that is, falls upon the fovea) is rendered with a higher resolution, while the remainder of the image is rendered at a lower resolution. Foveal rendering thus typically has a lower computational load than conventional full-resolution rendering processes. However, conventional displays used for VR or AR typically have a constant or uniform display pixel density across the entire display panel, due at least in part to the requirement that the display be capable of providing an image to the fovea of a user's eye from any area of the display that the user may gaze upon. As a result, it is still necessary in conventional display systems to deliver high-resolution pixel data to drive such conventional display panels. Accordingly, while computational load may be reduced in rendering the display image, conventional foveal rendering implementations necessitate the transmission of pixel data for each pixel of the display panel between the device rendering the image data and the device displaying the imagery, and thus such systems do not reduce the bandwidth requirements for transmitting display data to the display, nor do they reduce the power consumed by the display backplane in order to clock in the pixel data for the foveally-rendered display image. Moreover, such conventional display systems lack the flexibility to distribute the foveation processes, sub-pixel rendering processes, and other image and pixel processing functions so as to better optimize one or more of power consumption, integrated circuit availability, cost, and other considerations.